UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 38281

Ethernet IP Solution Center - Virtex-4/-5/-6 FPGA Embedded Tri-Mode Ethernet MAC Design Assistant

Description

The Embedded Tri-Mode Ethernet MAC Design Assistant will walk you through the recommended design flow while debugging commonly encountered issues, such as simulation issues, link failures, and data errors. The Design Assistant will not only provide useful design and troubleshooting information, but also point you to the exact documentation you need to read to help you design efficiently with the Embedded Tri-Mode Ethernet MAC.

NOTE: This answer record is part of the Ethernet IP Solution Center (Xilinx Answer 38279). The Xilinx Solution Center for Ethernet IP is available to address all questions related to Ethernet IP. Whether you are starting a new design with Ethernet IP cores or troubleshooting a problem, use the Solution Center for Ethernet IP to guide you to the right information.

解决方案

(Xilinx Answer 33593) - Core Functionality or Protocol Frequently Asked Questions (FAQ)
(Xilinx Answer 38314) - Simulation
(Xilinx Answer 38317) - Synthesis or Implementation
(Xilinx Answer 38319) - Hardware and Link bring up

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
38279 Ethernet IP 解决方案中心 N/A N/A

相关答复记录

AR# 38281
创建日期 10/08/2010
Last Updated 09/24/2012
状态 Active
Type 解决方案中心
器件
  • Virtex-5 FXT
  • Virtex-5 LXT
  • Virtex-5 SXT
  • More
  • Virtex-4 FX
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Less
IP
  • Virtex-5 Embedded Tri-Mode Ethernet MAC
  • Virtex-5 Embedded Tri-mode Ethernet MAC Wrapper
  • Virtex-6 FPGA Embedded Tri-mode Ethernet MAC Wrapper
  • Virtex-4 Tri-Mode Ethernet Media Access Controller