AR# 38319: Design Assistant for V4/V5/V6 FPGA Embedded Tri-Mode Ethernet MAC - Hardware Debug and Link Bring up
Design Assistant for V4/V5/V6 FPGA Embedded Tri-Mode Ethernet MAC - Hardware Debug and Link Bring up
This answer record identifies starting points when debugging hardware and link bring up issues to the Virtex-4/Virtex-5/Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC.
Note: This Answer Record is a part of the Ethernet IP Solution Center (Xilinx Answer 38279).The Xilinx Solution Center for Ethernet IP is available to address all questions related to Ethernet IP. Whether you are starting a new design with Ethernet IP cores or troubleshooting a problem, use the Ethernet IP Solution Center to guide you to the right information.
The Debugging Designs Chapter at the end of the Virtex-6 and Virtex-5 FPGA Embedded TEMAC Wrapper Getting Started Guide has a Hardware debug section with guidance on:
General Checks for Hardware Debug
Debugging Problems with Transmitting and Receiving Frames