AR# 38348: 10G Ethernet IP Design Assistant - Simulation Debug
10G Ethernet IP Design Assistant - Simulation Debug
This answer record identifies starting points when debugging simulation related issues to 10G Ethernet IP.
Note: This Answer Record is a part of the Ethernet IP Solution Center (Xilinx Answer 38279).The Ethernet IP Solution Center is available to address all questions related to Ethernet IP. Whether you are starting a new design with Ethernet IP cores or troubleshooting a problem, use the Ethernet IP Solution Center to guide you to the right information.
The Example Design generated with each core in Core Generator contains an example simulation testbench and scripts to get started. See the Simulating the Example Design section in the Ten Gigabit Ethernet MAC, XAUI and RXAUI cores. For the Ten Gigabit Ethernet PCS/PMA, see the Quick Start Example Design -> Simulating the 10GBASE_R Example Design section of the Users Guide for more details.
The Debugging Designs Chapter at the end of the XAUI and RXAUI User Guides has a Simulation Debug section with further tips on debugging Simulation setup and licensing, library compilation, and link bring up. These Guides are available at the below links: