AR# 38384: 10/100/1000Mbps Soft Logic Ethernet IP Design Assistant - Synthesis and Implementation
10/100/1000Mbps Soft Logic Ethernet IP Design Assistant - Synthesis and Implementation
This Answer Record identifies starting points when debugging synthesis and implementation related issues to the 10/100/1000Mbps Soft Logic Ethernet IP.This includes the Tri-Mode Ethernet MAC core, 1000BASE-X PCS/PMA or SGMII core, and Ethernet Statistics core.
NOTE: This Answer Record is part of the Ethernet IP Solution Center (Xilinx Answer 38279).The Xilinx Solution Center for Ethernet IP is available to address all questions related to Ethernet IP. Whether you are starting a new design with Ethernet IP cores or troubleshooting a problem, use the Solution Center for Ethernet IP to guide you to the right information.