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AR# 38571

Virtex-6 GTH Transceiver - Manually setting the tap values for the DFE

Description

This Answer Record contains the bit mappings for the DFE taps in the Virtex-6 GTH Transceiver.

解决方案

The DFE in the Virtex-6 GTHTransceiver has three taps.The table below contains the bit mappings for these taps; the bits that enable overriding the auto-calibration, and the equalization gain settings.


DFE Impact

Attribute Location:

Tap 1 Value [4:0]:

RX_AEQ_VAL1_LANE<n>[4:0]

Tap 1 Override:

RX_AEQ_VAL1_LANE<n> [5]

Tap 2 Value [4:0]:

RX_AEQ_VAL1_LANE<n> [10:6]

Tap 2 Override:

RX_AEQ_VAL1_LANE<n> [11]

Tap 3 Value [4]:

RX_AEQ_VAL0_LANE<n> [0]

Tap 3 Value [3:0]:

RX_AEQ_VAL1_LANE<n> [15:12]

Tap 3 Override:

RX_AEQ_VAL0_LANE<n>[1]

DFE Gain:

RX_AEQ_VAL0_LANE<n>[5:4]

AGC Gain:

RX_AEQ_VAL0_LANE<n>[3:2]

NOTE: Xilinx is only providing these bit locations for users who are interested in setting the feedback taps themselves.Performance whilemanually modifying these bits depends on use model.For supported DFE use cases, see the Virtex-6 GTH Transceiver User's Guide (UG371).

链接问答记录

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
37414 Virtex-6 GTH Transceiver - Attribute updates for ES silicon N/A N/A
38596 Virtex-6 FPGA GTH Transceiver - Known Issues and Answer Records List N/A N/A
AR# 38571
创建日期 10/14/2010
Last Updated 12/15/2012
状态 Active
Type 综合文章
器件
  • Virtex-6 HXT