AR# 38958: 12.4/13.4/14.7 MAP - "ERROR:MapLib:1209" and "ERROR:MapLib:1213" about V5 DCM/PLL to V6 MMCM retargeting
12.4/13.4/14.7 MAP - "ERROR:MapLib:1209" and "ERROR:MapLib:1213" about V5 DCM/PLL to V6 MMCM retargeting
When I retarget a Virtex-5 design containing DCM2PLL to Virtex-6, I receive the following errors:
ERROR:MapLib:1209 - Retargeting of PLL u_delayctrl/u_dcm_ddr/PLL_ADV_INST has COMPENSATION attribute is set to DCM2PLL or PLL2DCM. This is not supported yet in the tools to target a single MMCM. To enable an unoptimized retargeting please set XIL_MAP_NO_PLL2MMCM_COMP_ERROR environment variable.
ERROR:MapLib:1213 - DCM to MMCM retargeting of block 'u_dcm_ddr/DCM_ADV_INST' is not possible. Its target frequency, FVCO, is out of range. Valid FVCO range varies depending on speed grade: 600 - 1200MHz(-1), 1440MHz(-2), 1600MHz(-3).
The computed FCVO is a function of the input frequency CLKIN_PERIOD, the division factor DIVCLK_DIVIDE, and the CLKFX_DIVIDE and CLKFX_MULTIPLY attributes. The CLKIN_PERIOD attribute may have been set by ngdbuild based on the user specified PERIOD constraint.
How can I resolve these errors?
These errors indicate that the tool has problems retargeting the V5 DCM/PLL to V6 MMCM.
It is recommended to redesign and regenerate the MMCM cores when you retarget the design from V5 to V6, because the tool may not be able to retarget them automatically.
Below are the explanations of the two errors:
In the V5 design, the PLL COMPENSATION attribute is set to "DCM2PLL" which is not supported in MMCM.
defparam PLL_ADV_INST.COMPENSATION = "DCM2PLL";
To resolve this error, change this value to "SYSTEM_SYNCHRONOUS" or "SOURCE_ SYNCHRONOUS".
Alternatively you can regenerate the MMCM core manually.
This error indicates that the FVCO of MMCM is out of range when the tool is trying to retarget the V5 DCM to V6 MMCM.
You will need to regenerate the V6 MMCM to have it correctly configured to generate the clocks you need.