UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 3900

3.x FPGA Express - Error: "Type mismatch on left and/or right operand of binary operator. (VSS-523)"

描述

Keywords: VSS-523, libraries, VHDL, Express

Urgency: Standard

General Description:
When I compile a VHDL file that contains binary operation on bus signals, the following error occurs:

Error: <path to vhdl file> line <line number>
Type mismatch on left and/or right operand of binary operator. (VSS-523)

This error is due to a missing library.

解决方案

To avoid this error, be sure to include the following line in the library section of the VHDL file:

use IEEE.std_logic_unsigned.all;
AR# 3900
日期 08/11/2003
状态 Archive
Type 综合文章
的页面