UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 39566

12.1/12.2/12.3 iMPACT - Virtex-6 - Stand alone Read Status Register returns all 0

描述

When I read back the Virtex-6 FPGA Status Register from the Debug menu in iMPACT, I see all '0' in the Status Register. Why is this?

解决方案

After configuration via iMPACT and the subsequent "Status Register Read" included the device is left Synchronized. This means that for a stand alone "Status Register Read" the device is in an unexpected JTAG state and hence the Status Register comes back as all '0'. This issue is resolved in ISE 12.4 software.

Alternately, this may be due to some of the reasons listed in (Xilinx Answer 34599) - iMPACT - Status Register read shows all '0'.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
35448 12.x iMPACT - Known Issues N/A N/A
AR# 39566
日期 12/15/2012
状态 Active
Type 综合文章
器件 More Less
Tools
的页面