general description: If a HDL design contains bidiretional IO, sometimes FPGA Compiler will be unable to infer the correct type of IO; insert_pads sometimes fails.This happens if IOB_4000 are left in the netlist, or insert_pads/compile reports an error like this:
Error: Need to insert a pad on port 'MYCLOCK' before compiling.(OPT-1000)
This solution has tips on handling problems when insert_pads fails.This solution record applies to both FPGA Compiler and Design Compiler.This solution applies to any family in the FPGA Compiler/Design Compiler flow that uses the insert_pads/set_port_is_pads commands.