AR# 40040: LogiCORE Linear Algebra Toolkit - Release Notes and Known Issues
AR# 40040
LogiCORE Linear Algebra Toolkit - Release Notes and Known Issues
描述
This Answer Record contains the Release Notes and Known Issues list for the CORE Generator LogiCORE Linear Algebra Toolkit Core.
The following information is listed for each version of the core:
New Features
Resolved Issues
Known Issues
解决方案
LogiCORE Linear Algebra Toolkitv1.0
Initial Release in ISE 13.1.
New Features
Fixed-point matrix-matrix addition and subtraction, matrix-scalar multiplication, matrix-matrix multiplication supported
Configurable matrix dimension supported up to 32x32
Real or complex data support (design is optimized for both types)
Two's complement fixed-point maximum of 24-bit input and 48-bit output (for matrix multiplication, maximum input width support is for 24-bit x 18-bit unit multiplication)
Symmetric, asymmetric, convergent, and truncation options for output rounding
Output saturation is supported
Fully AXI4 real-time streaming compliant core
Fully synchronous, single clock domain design with AXI4-Stream Protocol compliant synchronous active low reset
Clock Enable (CE) input provided, core can be paused and resumed on-the-fly by de-asserting and re-asserting CE signal
User selectable folding factor (resource reuse factor, 1 indicating no reuse, 2 for resources reused twice, and so on) for resource optimization
Data I/O Support: serial (where matrix elements are fed serially) or parallel (where matrix elements are packed and fed to the core)
Uses SIMD mode of DSP48E1 to implement complex addition (in matrix addition/subtraction mode) on a single slice
Option of DSP48E1 slice or LUT (implemented on the fabric) based implementation for matrix-matrix addition/subtraction
Folding factors supported for matrix size MxN (for matrix addition, subtraction and scalar multiplication) are:1, 2, 3, M, N, MN
Folding factors supported for matrix multiplication CMxN = AMxL x BLxN are:1, 2, 3, M, MN
Bit-accurate C Model available
Resolved Issues
None
Known Issues(ISE)
None
Known Issues (Vivado)
(Xilinx Answer 53465) 2012.4 Vivado Simulator - Why does my DSP Digital Communications core fail to simulate with error Error: Failed to find design work <Core name>?