Please refer to this answer record for help with Register Duplication and fanout.
Note: This answer record is a part of the Xilinx Solution Center for XST (Xilinx Answer 38927). The Xilinx Solution Center for XST is available to address all questions related to XST. Whether you are starting a new design or troubleshooting a problem, use the Solution Center for XST to guide you to the right information.
Register Duplication is an XST option which helps to improve design timing performance. It reduces fanout on registers by replicating registers, which improves path delays to meet the timing requirements.
Register Duplication can be used along with the Max_fanout constraint. The Max_fanout constraint limits the fanout of nets or signals. It guides XST on how many registers to be duplicated.
Before setting Max_fanout (fanout = 4)
After setting Max_fanout=2
Register Duplication and Max_fanout can be applied globally or to a specific entity, module, component or signal. Refer to (Xilinx Answer 39749) for help on applying XST constraints.
Some considerations when using Register Duplication and Max_fanout:
For more information of Register Duplication and Max_fanout, please refer to XST User Guide See (Xilinx Answer 38931).