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General Description: map gives the following error related to RLOC'd RAM including RAM generated by the CORE Generator:
ERROR:x4kma:312 - The following symbols could not be constrained to a single CLB: DFF symbol "fpga_core_i_cu_ram_r256x8_i/r256x8/ablock/large_ram_we0/newSim1535/dff" (output signal=fpga_core_i_cu_ram_r256x8_i/ablock/dcode_0) FMAP symbol "fpga_core_i_cu_ram_r256x8_i/r256x8/ablock/large_ram_we0/dcodeslice_0func/newS im1534" (output signal=fpga_core_i_cu_ram_r256x8_i/ablock/large_ram_we0/dcode_in_0) HMAP symbol "fpga_core_i_cu_ram_r256x8_i/r256x8/ablock/large_ram_we0/newSim1539" (output signal=fpga_core_i_cu_ram_r256x8_i/ablock/dwe_0) FMAP symbol "fpga_core_i_G_1220" (output signal=fpga_core_i_us_cm_we) More than two combinational outputs are required. These symbols share the same RLOC attribute value, which requires them to be mapped to the same CLB.
This problem is fixed in the latest M1.4 Core Tools Update available on the Xilinx Download Area:
NOTE: For this issue, the environment variable XIL_MAP_NO_FMAP_PACK must be set in addition to installing the appropriate software update. For M1.5, the Sevice Pack must be installed for the environment variable to work. For M1.4, the latest Core Tools Update must be installed.
setenv XIL_MAP_NO_FMAP_PACK (SunOS and Solaris) setenv XIL_MAP_NO_FMAP_PACK 1 (HP) set XIL_MAP_NO_FMAP_PACK = 1 (PC)