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AR# 40377

Design Assistant for XST - Resolving fatal errors, internal errors, out of memory issues, and hanging issues


Refer to this answer record for help resolving XST fatal errors, internal errors, out of memory issues, or hanging issues.

NOTE: This answer record is part of the Xilinx Solution Center for XST(Xilinx Answer 38927). TheXilinx Solution Center for XST is available to address all questions related to XST. Whether you are starting a new design or troubleshooting a problem, use the Solution Center for XSTto guide you to the right information.


Fatal errors, internal errors,out of memory issues, or hanging issueswithin XST are generally difficult to resolve because they only occur when XST has run into an unexpected condition. These errors generally do not point to a module or a line of code that caused the issue.Fixing one of these errors generally does not resolve another error. Fortunately, these errors rarely occur and most users never run into them.

To resolve these kinds of issues, first try to change the Synthesis options. The Synthesis options that usually affect these issues are as follows:

  • keep_hierarchy
  • opt_mode
  • opt_level
  • equivalent_register_removal
  • use_dsp48
  • read_cores
  • Other options

If modifying the Synthesis options does not resolve the issue, follow the steps below to narrow down the problem:

Step 1: To narrow down where the failureoccurred, look at the synthesis report (.syr) and find the location of theerror. Try narrowing down the error into one of the following process categories:

  • Compilation
  • HDL Analysis
  • Advanced HDL Synthesis
  • Low Level Synthesis

Compilation/ HDL Analysis: If the error occurs during Compilation or HDL Analysis, checkfor the file that last compiled correctly. Then, open the ".prj" file and look for the file next to the last compiled file. Typically, the failure occurs within that file.

Advanced Synthesis: If the error occurs during HDL Synthesis/Advanced HDL Synthesis, check to see the Unit where the error occurred.Also, see if it is possible to determine the process or FSM where the error occurred. This will help narrow down the line that caused the error.Try different variations of the HDL options to narrow down the type of inference that caused XST to error.

Low Level Synthesis: These Errors in Low Level Synthesis provide information in narrowing down the failure to a module. Occasionally, all these errors are caused due to a combination of the XST options. Try changing the XST options to see if this could make a difference.

Step 2: Narrow the failure down to one file.Try synthesizing thisfileall by itself.See if synthesizing this fileby itselfcauses the same error. If none of the above clues help in narrowing down to just one file, then try iteratively blackboxing components until the failure is gone.Blackboxing components will help determinethe modulecausing the problem, and it also helps shorten the XST run. Keep going to lower level modules until the file causing the problem is found. For help with blackboxing components, see (Xilinx Answer 39980).

Step 3: Once the module causing these errors is found, try narrowing it down further to a line or a particular signal, state machine, or process.This can beachieved by commenting out the lines of code that are not the source forthese errors. Also, try removing the output ports.This generally helps ineliminating large sections of code in a module that areinvolved in driving some ofthe output ports.

Step 4: Once you have narrowed the error down to several lines of code, try implementing the same logic in another way.There are many waysby which the same logic can be implemented. One of these might allow you to find a work-around for these errors.

Xilinx is committed to resolving fatal errors, internal errors, out of memory issues, and hanging issues. Your opening a Webcase is greatly appreciated so that development will fix this issuein a future release.Before filing a Webcase, pleasemake sure to have a test case available to send to Xilinx Technical Support.



Answer Number 问答标题 问题版本 已解决问题的版本
38927 面向 XST 的 Xilinx 解决方案中心 N/A N/A


AR# 40377
日期 05/20/2014
状态 Active
Type 综合文章