The MIG 7 Series tool allows users to select specific Byte Groups within an FPGA Bank for Data and Address/Control groups.The tool does not allow users to select the specific pins within those byte groups. If the pin-out generated by MIG does not follow the desired pin-out on my board, how can the design be modified?
Starting with MIG 7 Series 1.2 (available with ISE 13.2), the tools include the Verify UCF and Update Design and UCF feature. This feature allows users to input a UCF with the desired pin-out and have MIG generate the appropriate design and UCF files.
For MIG 7 Series 1.1, users need to ensure that the correct Byte Group assignments are made in the MIG generated design. From there, this Answer Record details the steps to move pins within a byte group. For example, the data group associated with DQS[0] must be assigned to the appropriate Byte Group TX within the tool. This Answer Record shows the manual changes required to swap DQ[0] with DQ[7] (as an example) in the generated design.
# # | Pad Name | Pin Name | vref bank | vcco bank | function name | nearest CLB | diff pair | tracelength (um) | |
pin | IOB_X0Y38 | AA20 | 12 | 12 | IO_L6P_T0_12 | N/A | 5M | N/A | |
pin | IOB_X0Y37 | AB20 | 12 | 12 | IO_L6N_T0_VREF_12 | N/A | 5S | N/A | |
pin | IOB_X0Y36 | AB24 | 12 | 12 | IO_L7P_T1_12 | N/A | 6M | N/A | |
pin | IOB_X0Y35 | AC25 | 12 | 12 | IO_L7N_T1_12 | N/A | 6S | N/A |
2. Locate the top-level RTL parameters that will need to be changed. Refer to the table below to determine which RTL parameter(s) will have to be changed these *_MAP parameters are used by the RTL to connect the DDR3 I/O with both the appropriate PHASER blocks, and the appropriate bit lanes within these PHASER blocks.
# # | pad name | pin name | vref bank | vcco bank | function name | nearest CLB | diff pair | tracelength (um) |
pin | IOB_X0Y204 | H26 | 16 | 16 | IO_L23P_T3_16 | N.A. | 118M | N/A |
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
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40050 | MIG 7 Series v1.1 - Release Notes and Known Issues for ISE Design Suite 13.1 | N/A | N/A |
AR# 40428 | |
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日期 | 02/12/2013 |
状态 | Active |
Type | 综合文章 |
器件 | |
Tools | |
IP |