AR# 40473


LogiCORE IP Triple-Rate SDI (Serial Digital Interface) Virtex-6 - Release Notes and Known Issues


This answer record contains the Release Notes and Known Issues list for the CORE Generator LogiCORE IP Triple Rate Serial Digital Interface (SDI) Core.

The following information is listed for each version of the core:

  • New Features
  • Bug Fixes
  • Known Issues

LogiCORE IP Triple Rate SDI:


General LogiCORE IPTriple Rate SDI Issues

LogiCORE IP Triple Rate SDI v1.0
Initial Release in ISE 13.1 software

Supported Devices
  • Virtex-6 XC CXT/LXT/SXT/HXT
  • Virtex-6 XQ LXT/SXT
  • Virtex-6 -1L XC LXT/SXT
New Features
  • ISE 13.1 software support
  • First release of this core in the CORE Generator software
Bug Fixes
  • N/A
Known Issues
  • (Xilinx Answer 41383)- The 13.1 Versions 1.8 and 1.9 of the Virtex-6 FPGA GTX Transceiver Wizard do not work with the Triple-Rate SDI v1.0 core
  • (Xilinx Answer 42861)- What is the correct signal name for txbufstatus1 connection, in the Verilog triple_sdi_rxtx_top.v top-level module?
  • (Xilinx Answer 45237) - Where do I find the UCF constraints for the SDI reference design?
  • (Xilinx Answer 53539) - How many cycles does the crc_err_a and crc_err_b remain asserted?




AR# 40473
日期 12/18/2012
状态 Archive
Type 版本说明
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