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AR# 40547

13.1 - ChipScope - IBERT - When generating an IBERT Virtex-6 GTX core I see the following messages - "ERROR:sim - Unable to evaluate Tcl command: ::xilinx::sim::generation::generatePsfCore {chipscope_ibert_virtex6_gtx_v2_05_a} {chipscope_ibert} {ALL}"

描述

When generating an IBERT Virtex-6 FPGA GTX core for a lx550t or sx475t device I see the following messages in the CORE Generator Console:

ERROR:sim - runMap : IBERT:map: Check report <user path>/tmp/_cg/_bbx/example_chipscope_ibert.map.mrp for more information.
ERROR:sim -
WARNING:coreutil - map failed on example_chipscope_ibert.
invoked from within
"runMap example_[getComponentName] "" "
(procedure "components::chipscope_ibert::post_generation" line 28)
invoked from within
"$PostGenerationTargets"
(procedure "::xilinx::sim::generation::generatePsfCore" line 66)
invoked from within
"::xilinx::sim::generation::generatePsfCore {chipscope_ibert_virtex6_gtx_v2_05_a} {chipscope_ibert} {ALL}"
ERROR:sim - Unable to evaluate Tcl command:
::xilinx::sim::generation::generatePsfCore {chipscope_ibert_virtex6_gtx_v2_05_a} {chipscope_ibert} {ALL}
ERROR:sim - Error found during generation.

I then see the following message(s) in the <user path>/tmp/_cg/_bbx/example_chipscope_ibert.map.mrp -

ERROR:Place:1145 - Unroutable Placement! A GT / BUFGCTRL clock component pair have been found that are not placed at a
routable GT / BUFGCTRL site pair. The GT component <U_CHIPSCOPE_IBERT/U0/U_IBERT_CORE/U_GTCPX_X0Y14/U_GT/gtxe1_i> is
placed at site <GTXE1_X0Y14>. The corresponding BUFGCTRL component
<U_CHIPSCOPE_IBERT/U0/U_IBERT_CORE/U_GTCPX_X0Y14/U_RXRECCLK_BUFG> is placed at site <BUFGCTRL_X0Y30>....

How do I work around this issue?

解决方案

This issue will occur if you have selected more than 8 GTs in either the top or bottom half of the device. Regenerate your core with fewer GTs. This issue will be flagged as a warning when you enter your IBERT options in COREGenerator from ChipScope tool 13.2 forward.

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
40485 13.x ChipScope Pro - Known Issues for the ChipScope Pro 13.x Software N/A N/A
AR# 40547
日期 01/02/2013
状态 Active
Type 综合文章
器件
  • Virtex-6 CXT
  • Virtex-6 HXT
  • Virtex-6 LX
  • More
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Less
Tools
  • ISE Design Suite - 13.1
IP
  • ChipScope Pro IBERT for Virtex-6 GTX
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