描述

Whenever a new VHDL, Verilog, or Testbench file is created, few information is given, as shownbelow. Iwant the values in the generated files to be automatically populated with my company and user-specific data.

Can this be done?

解决方案

No, Project Navigator does not have a way to pull in user-specific data for these generated files.

You can hard code some of your own data for three of the generated templates using the following files:

%XILINX%\ISE\data\projnav\scripts\dpm_sourceTasks.Tcl, line 713- VHDL Module

%XILINX%\ISE\data\testbnch2.tcl- VHDL Testbench

%XILINX%\ISE\data\projnav\scripts\dpm_sourceTasks.Tcl, line 622- Verilog module