AR# 40690

描述

解决方案

Flight Time

(Xilinx Answer 15321) Virtex Devices in Flip-Chip Packages / Source Synchronous Data Sheet - Where is the package TRACE length/flight time information located?
(Xilinx Answer 18078) Packaging: Wire-Bonded (BG / FG packages) - Why are package trace length/flight times for wire-bond packages not available?

Heat Sink

(Xilinx Answer 12912) - Are the heatsinks (heat spreader) on the Flip-Chip (FF) packages floating or grounded?
(Xilinx Answer 12291) Packaging - What is the maximum weight limit (spring loading) for a particular package/heatsink combination?
(Xilinx Answer 10676) Virtex-II Packaging - Who are the recommended socket vendors for FF packaging?

Pin Out

(Xilinx Answer 8554) FPGA Package Pin-out Data Sheet - In the device pin-out tables, what does No Connect (NC) mean?
(Xilinx Answer 32725) Spartan-6 - Preliminary package files definition

Temperature Management

(Xilinx Answer 10078) OrCAD - Does Xilinx provide device or package symbols for OrCAD layout tools?
(Xilinx Answer 9088) Packaging - Does Xilinx provide "Theta-JB" (Thermal Resistance from junction to board) data for its packages?
(Xilinx Answer 34867) FF/FFG1136 - temperature differential between the package and the solder balls
(Xilinx Answer 39279) Require package thermal models for XCF32PVOG48C or any PROM device
(Xilinx Answer 22359) Virtex-4 Packaging - Does Xilinx provide package thermal models?
(Xilinx Answer 9088) PACKAGING - Does Xilinx provide Thermal Resistance ("Psi-JB", "Theta-JC", or "Theta-JB") for Configuration PROMs?
(Xilinx Answer 1837) Thermal Data, FPGA - What is the absolute maximum junction temperature (Tj max) for plastic and ceramic parts?