AR# 40946

描述

For the LogiCORE CPRI core v3.2, what is the smallest Spartan-6 FPGA that supports the dual core IP configuration with different line rates?

解决方案

The dual core configuration using different line rates of the CPRI core will not fit into an xc6slx25t device. 

This is because the default dual core configuration needs two PLLs that are accessible from the GTPA1 via BUFIOs. 

The xc6slx25t only has one.

The work-around is to do the following:

• Have a dual core configuration with the same line rate which fits in the next smallest part (xc6slx25t),
Or
• Have a dual core configuration with different line rate which would have to fit in the next smallest part (xc6slx45t)

For LogiCORE CPRI - Release Notes and Known Issues, see (Xilinx Answer 36969)

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