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AR# 4129

MAP: baste:263- The LOC contraint is not valid for IPAD symbol, which is being mapped to the following site types: CLKIOB

Description


Keywords: baste, 263, LOC, constraint, clk, CLKIOB

Urgency: standard

General Description:

MAP may error out with the following message.

ERROR:baste:263 - The LOC constraint "P7" (a IOB location)
is not valid for symbol "SIG_PO" (pad signal=SIG), which is
being mapped to the following site types:
CLKIOB

The reason this has occurred is because the netlist dictates
that the clock signal comes into the device and directly into
the input of a global buffer. However, because the clock
signal is not placed to an IOB with this direct access to a
global buffer, this is an illegal connection.

The solution is to insert an input buffer between the pad and
the global buffer.

解决方案

1


Schematic entry
---------------

If this clock I/O has been entered in schematics, then simply
insert an IBUF between the IPAD and global buffer.

2


HDL code
--------

If the netlist has been synthesized from HDL code, the
resolution will depend on the synthesis tool.

For Foundation Metamor XVHDL, the workaround is to instantiate
a global buffer with the external clock signal connected to its
input and the output connected to internal logic.


Please note: this issue is fixed in v1.5i or newer version of the
software.
AR# 4129
创建日期 06/26/1998
Last Updated 04/25/2000
状态 Archive
Type 综合文章