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AR# 414

2.1i: NGD2EDIF: WARNING:NgdHelpers:33 - NOTE: This design contains the undriven net "PRLD"

Description

Keywords: 2.1i, ngdhelpers, 333, prld

Urgency: Standard

General Description:
This warning appears during NGD2EDIF (timing netlist generator)

WARNING:NgdHelpers:333 - NOTE: This design contains the undriven net "PRLD"
which you could drive during simulation to get valid results.
writing EDIF file to 'time_sim.edn' ...

解决方案

When a 9500* powers up, the registers can be preloaded with a value
if the register is given an INIT=S property. If no init properties
are assigned, all registers in the 9500* will power up with a 0 value.
In the fitter report, this is listed as .PRLD - short for preload.
Each register will have a .PRLD, and it will be set to GND unless
you initialize it, in which case it will be set to VCC.

In order to simulate this preload on power-up, the PRLD signal
needs to be toggled to set the registers in their proper
power-up state. This warning is in regards to timing simulation
only and has no effect on physical device operation.

*9500/XL/XV
AR# 414
创建日期 09/20/1995
Last Updated 06/13/2002
状态 Archive
Type 综合文章