AR# 4143: Orcad Simulate: Simulation error message: [Load085] entity 'xxxx' not found
AR# 4143
Orcad Simulate: Simulation error message: [Load085] entity 'xxxx' not found
Description
Keywords: Express, Simulate, CIS, Windows, Orcad
Urgency: Standard
General description: During simulation, I get the error message: [Load085] entity 'xxxx' not found.
OrCAD has provided three scenarios that might give you this error message. For further information please check the OrCAD web site at http://www.orcad.com
解决方案
1
Scenario 1
You get the error message: "[Load085] entity 'xxxx' not found" for all your I/O pads (for example, you get the error message on an IPAD you had renamed "CLOCKIN").
In order for the compiler to find the corresponding entity declaration, all parts must retain their vendor-specified value. The compiler matches part values with VHDL entity declarations. A mismatch can occur if, for example, you rename an IPAD something like "CLOCKIN." The compiler library has no entity called CLOCKIN, but it does have an entity called IPAD, and can match that part value.
If you want to rename a part, you can place text by the part, or create a user-defined, visible property with another name in the property Value field.
2
Scenario 2
You have a design that contains custom parts and have transferred the design to Express, but when you try to compile it, it fails and generates the error message: "[Load085] entity 'xxxx' not found" for every custom part in the design.
The error message displays because you are missing required compiler library files. Every part in your design needs a corresponding compiler .STL library file declaration. This is a VHDL entity declaration describing the portmap (pinout) of the part. OrCAD provides those declarations for all parts supplied with the product, but you must provide them for any custom parts you use. The .STL file is a text file of VHDL code. Use it as a format guide in creating a custom entity statement.
Also, when you simulate your design, you need a VHDL simulation model for every part. This file describes the behavioral architecture of the part. OrCAD provides simulation models for all supplied parts, but you must create one for any custom part. You can use the .VHD simulation model files we provide as examples of simulation model formats. The Esperan VHDL tutorial provided with Express, along with the online VHDL Style Guide and online VHDL Reference, are other resources you can use in the creation of custom models. You can access these documents on the Help menu in Express.
3
Scenario 3
You receive the error message: "[Load085] component 'AND1' not found," yet your design doesn't include any AND1 components, and there is no AND1 symbol in the simulation or synthesis libraries. However, when you check the VHDL netlist, it references three AND1 symbols.
It's likely that your project is missing some library files. In Simulate, you must specifically load simulation model libraries and, therefore, you must be sure to load all the simulation libraries for the specific vendor and family you're using in your design.
For Express, this error typically occurs when you have created a blank project from the project wizard, and added the synthesis and simulation libraries yourself.
The error may also occur in Express if you created a project in a particular family (using the project wizard) and then added components from another family to the design.
Normally, if you create your Express project with the project wizard, Express adds all the necessary library files to your project automatically.
Many vendors require two sets of simulation and synthesis libraries for each family: one that models primitives and another that models macros. These models reside in library files with names that end in "_p" and "_m," respectively. Be sure to add the appropriate library files to the project for all the component families used in the design.
Also, although your design may not specifically use a particular component (in this case, AND1) it may still use macros that reference that component. A specific example is the Xilinx AND3 macro, which references the AND1 component. When you attempt to compile or simulate your design, the simulator or compiler can locate the macro, but not the primitive components within the macro, indicating that a library is missing from the project.