AR# 4162


3.1i TRCE - Timing loop reported for Virtex designs with DLL's


General Description:

TRCE is reporting that the DLLs are part of a timing loop, and that it has disabled timing through them. Here is an example of a TRCE report:

"2767 circuit loops found and disabled"

This message refers to the number of potential paths through the DLL feedback connections that are not analyzed. These

would be clock paths that pass through the DLL, the feedback input, and back to the DLL. There is most likely one of these for every register in the design.


There is no way to disable the message; you can simply ignore it.

AR# 4162
日期 01/18/2010
状态 Archive
Type 综合文章
People Also Viewed