A CPLD design contains a clock pad assigned to a global clock using a BUFG symbol. The clock pad does not appear in the Global tab of the Constraints Editor. I cannot create any Period, Pad-to-Setup or Clock-to-Pad timespecs relative to that clock in any of the tabs of the Constraints Editor.
For CPLDs, clock pads are only recognized by the Constraints Editor if they are buffered using an ordinary IBUF, but by a BUFG.
To assign a clock to a global clock (GCK) pin so that it will be recognized by the Constraints Editor, use an IBUF symbol and apply the "BUFG=CLK" property to the clock pad net or the IBUF instance. You can apply the BUFG=CLK property either in the design (netlist) or by hand-editing the UCF file. (The BUFG property cannot be entered using the Constraints Editor.)