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AR# 42675

LogiCORE IP Ten Gigabit Ethernet PCS/PMA (10GBASE-R) v2.1, 7 Series Transceiver Wrapper - GTX Port Name Changes in ISE 13.2 Software

描述

When using the Ten Gigabit Ethernet PCS/PMA (10GBASE-R) v2.1 core (released in ISE13.1 software), be aware that the port list in 7 Series FPGAs Transceivers has changed (released in the ISE 13.2 software). For simulation or implementation in the 13.2 software,youneed to update your instantiations to account for these port changes.For more information on the change, see (Xilinx Answer 42615).

解决方案

To work around this issue, you must change the ports of GTXE2_CHANNEL and GTXE2_COMMON instantiation.

Modification in GTXE2_CHANNEL Instantiation

In the /example_design/gtx/gtwizard_10gbaser_gt.v/vhd file:

Change:
'CPLL_RXOUT_DIV'
To:
'RXOUT_DIV'
and...
Change:
'CPLL_TXOUT_DIV'
To:
'TXOUT_DIV'

Modification in GTXE2_COMMON Instantiation

In the /example_design/gtx/gtwizard_10gbaser.v/vhd file:

Change:

BGBYPASS => tied_to_ground_i,
BGMONITOREN => tied_to_ground_i,

To:

BGBYPASSB => tied_to_vcc_i,
BGMONITORENB => tied_to_vcc_i,

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
40629 LogiCORE IP Ten Gigabit Ethernet PCS/PMA (10GBASE-R) v2.1 - Release Notes and Known Issues for ISE Design Suite 13.1 N/A N/A

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
42615 Design Advisory for 7 Series FPGA Transceivers - GTX Port Name Changes in ISE 13.2 Software N/A N/A
AR# 42675
日期 12/15/2012
状态 Active
Type 综合文章
IP
  • Ten Gigabit Ethernet PCS/PMA
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