AR# 42857

Kintex-7 GTX IBERT - Using Internal System Clock Source Causes Error in BitGen

描述

In 13.2, the Kintex-7 GTX IBERT core generate errors in BitGen if you do not use an external clock source for the IBERT system clock. You see an error similar to:

ERROR:PhysDesignRules:798 - The network <q2_clk0_mgtrefclk> has an antenna.
Routing is incomplete.
ERROR:PhysDesignRules:9 - The network <q2_clk0_mgtrefclk> is only partially
routed.

解决方案

This is a known issue for the Kintex-7 GTX IBERT core in 13.2. In 13.2, you need to use an external clock source with the Kintex-7 GTX IBERT core. This will be fixed in 13.3.
AR# 42857
日期 05/19/2012
状态 Active
Type 已知问题
器件
Tools