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AR# 4333

2.1i - EPIC/FPGA Editor and TRACE give different names for superbels and components

Description

Keywords: EPIC, TRCE, superbel, M1.5, component

Urgency: Standard

General Description:
When I create a superbel in EPIC, it is assigned a component name and a superbel name. The component name is the name I give it; the superbel name is a machine- generated name.

When I then run TRCE/Timing Analyzer on this NCD file (and the PCF file contains constraints that cause TRCE to look at these superbels), TRCE will issue several warnings stating that these components will be ignored in the analysis. However, the name listed in the warning is the superbel name. Therefore, there is no way to trace the name back to EPIC to verify that it is a superbel.

解决方案

This problem is addressed in the next software release.
AR# 4333
创建日期 07/27/1998
Last Updated 07/09/2001
状态 Archive
Type 综合文章