The "Verify Pin Changes and Update Design" flow might error out with a PRJ and UCF file created prior to MIG 7 Series v1.3 if the new rules have been violated. The new bank selection rules are scheduled to be updated in MIG 7 Series v1.4.
If these new rules must be avoided, please contact Xilinx Technical Supportfor assistance.
Answer Number | 问答标题 | 问题版本 | 已解决问题的版本 |
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43099 | MIG 7 Series v1.3 - Release Notes and Known Issues for ISE Design Suite 13.3 | N/A | N/A |
AR# 43481 | |
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日期 | 03/07/2013 |
状态 | Active |
Type | 综合文章 |
器件 | |
IP |