UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!
  1. Xilinx -灵活应变. 万物智能.
  2. 技术支持
  3. AR# 43908: MIG 7 Series v1.2 DDR3 - SIM_BYPASS_INIT_CAL options Not Documented in UG586

AR# 43908

MIG 7 Series v1.2 DDR3 - SIM_BYPASS_INIT_CAL options Not Documented in UG586

描述

It is recommended that you avoid using the SIM_BYPASS_INIT_CAL parameter "OFF" option set in sim_tb_top for simulations as this will cause extremely long run times and should only be used for hardware testing.

解决方案

Instead, set SIM_BYPASS_INIT_CAL to either "SIM_INIT_CAL_FULL", "FAST", or "SIM_FULL" in sim_tb_top. 

For more details, see (Xilinx Answer 44019).

  • FAST enables a fast version of read and write leveling. 
  • SIM_FULL enables full calibration but skips the power up initialization delay. 
  • SIM_INIT_CAL_FULL enables full calibration including the power-up delays.
 
These parameters value will be documented in the 7 Series FPGAs Memory Interface Solutions User Guide (UG586) starting in the 13.4 software release.

 

链接问答记录

主要问答记录

Answer Number 问答标题 问题版本 已解决问题的版本
43099 MIG 7 Series v1.3 - Release Notes and Known Issues for ISE Design Suite 13.3 N/A N/A

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
44019 MIG 7 系列 v1.2 DDR3 - SIM_BYPASS_INIT_CAL = "OFF" 仅支持硬件，且无法实现行为仿真 N/A N/A
43099 MIG 7 Series v1.3 - Release Notes and Known Issues for ISE Design Suite 13.3 N/A N/A
41227 MIG 7 Series v1.2 - Release Notes and Known Issues for ISE Design Suite 13.2 N/A N/A
AR# 43908
日期 08/19/2014
状态 Active
Type 已知问题
器件
IP
的页面