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13.3 EDK, AXI_V6_DDRx - Lower memory throughput in EDK 13.3 only
In EDK 13.3 software, reduced memory throughput is seen relative to 13.2 when using the AXI_V6_DDRx controller. How do I resolve this issue?
The reduced throughput may be caused by an error in theC_RD_WR_ARB_ALGORITHM parameter.This parameter determines the arbitration between the read and write channels of the AXI interface.
To revert to the arbitration scheme used in 13.2 and earlier, add the following line to the MHS file in each controllers instance:
PARAMETER C_RD_WR_ARB_ALGORITHM = RD_PRI_REG
This issue is fixed in the latest version starting with EDK 13.4 software.
- Virtex-6 CXT
- Virtex-6 HXT
- Virtex-6 LX
- Virtex-6 LXT
- Virtex-6 SXT