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AR# 45332

Project Navigator - X_ROC and T_ROC appear as undefined in Simulation Hierarchy


If I attempt Post-PAR Timing Simulation, question marks appear to the left of specific Xilinx simulation primitives (e.g., X_ROC and X_TOC).


This problem is illustrated in the following screen shot. Observe that under Testbench -> UUT the boxes to the left of "NlwBlockROC - X_ROC" and "NlwBlockTOC - X_ROC" have question marks inside them.

The icon with a question markusually signifies that the tools are unableto locate a themodule or the library where the the module is located.However, simulation completes as expected.

Is this an issue I should be concerned about?


In this case, the questionmark iconis misleading and should be ignored.

This icon is being used becauseProject Navigator does not have a user file to associate the module to, and therefore,uses the default undefined module icon.

AR# 45332
日期 05/19/2012
状态 Active
Type 已知问题
  • ISE Design Suite - 13.3