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AR# 46013

13.4 CORE Generator - 在 EDK 生成网表无法删除 ChipScope vdbl 文件

Description

当我试图为设计生成网表时,在 EDK 中出现以下错误 :

"ERROR:EDK - chipscope_plbv46_iba_0 (chipscope_plbv46_iba) - error deleting "<Path the EDK project>/nt/run/implementation/chipscope_plbv46_iba_0_wrapper\tmp\_cg\chipscope_plbv46_iba_0_debug\_bbx\chipscope_plbv46_iba_0_chipscope_ila_v1_03_a_xst\chipscope_lib_v1_03_a\chipscope_lib_v1_03_a.vdbl": no such file or directory"

解决方案

当 vdbl 文件的路径超过 256 个字符,出现此错误。当路径短于 256 个字符,网表可成功生成。

此问题将在 ISE Design Suite 14.1 中进行修复。

AR# 46013
创建日期 01/26/2012
Last Updated 05/19/2012
状态 Active
Type 已知问题
Tools
  • ISE Design Suite - 13.4