UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 46024

7 Series GTX - How do you override the Phase Interpolator (PI) phase?

Description

How can I override the CDR Phase Interpolator (PI) phase?

解决方案

In order to set the CDR PI phase, please set the ports as follows:

RXCDRHOLD = 1'b0

RXCDROVRDEN = 1'b1

The PI phase is driven by 7 bits of RXCDR_CFG parameter.
The PI can vary the output phase with 128 steps spanning the VCO period (two UI due to DDR).

For IES silicon:

RXCDR_CFG[36:30]

For GES silicon:

RXCDR_CFG[15:9] The DRP address hex is 0A8[15:9]

In changing the phase, never jump more than 8 positions per update.

AR# 46024
创建日期 02/28/2013
Last Updated 02/28/2013
状态 Active
Type 综合文章
器件
  • Virtex-7
  • Kintex-7