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  3. AR# 46483: XAUI v10.2 and RXAUI v2.2 - Core fails to regain Synchronization after link partner restarts transmission on 7 Series Devices

AR# 46483

XAUI v10.2 and RXAUI v2.2 - Core fails to regain Synchronization after link partner restarts transmission on 7 Series Devices

描述

When the far end stops transmitting or powers down, the GTX receiver requires a reset on the resumption of data transmission.  This is done by adding the code below to drive the signal 'mgt_rx_reset' in the block level source file.

This solution applies to the XAUI v10.2 or RXAUI v2.2 core with Kintex-7 or Virtex-7 GTX transceivers when using Initial ES or General ES silicon.  This code will be added to the next release of the cores.

 

解决方案

If using Verilog add the following to example_design/core_name_block.v:

 

localparam SYNC_COUNT_LENGTH  = 16;
reg     [SYNC_COUNT_LENGTH - 1:0]    sync_counter  = {SYNC_COUNT_LENGTH{1'b0}};


  // Sync counter - GT requires a reset if the far end powers down
  always @(posedge clk156) begin
    if (sync_counter[SYNC_COUNT_LENGTH - 1]) begin
      sync_counter <= {SYNC_COUNT_LENGTH{1'b0}};
    end
    else if (!(&sync_status_i)) begin
      sync_counter <= sync_counter + 1'b1;
    end
    else begin
      sync_counter <= {SYNC_COUNT_LENGTH{1'b0}};
    end
  end

// Modify the line below - add topmost bit of sync_counter into the mgt_rx_reset in your design
assign mgt_rx_reset = (... || sync_counter[SYNC_COUNT_LENGTH-1]) && reset_counter[5];

If using VHDL add the following to example_design/core_name_block.v: :

  constant SYNC_COUNT_LENGTH       : integer := 16;
  signal sync_counter              : unsigned(SYNC_COUNT_LENGTH - 1 downto 0)  := (others => '0');

  -- Sync counter GT requires a reset if the far end powers down.
  process (clk156) begin
    if rising_edge(clk156) then
      if (sync_counter(SYNC_COUNT_LENGTH - 1) = '1') then
        sync_counter <= (others => '0');
      elsif (sync_status_i /= "1111") then
        sync_counter <= sync_counter + 1;
      else
        sync_counter <= (others => '0');
      end if;
    end if;
  end process;
-- Modify the line below - add topmost bit of sync_counter into the mgt_rx_reset in your design
mgt_rx_reset <= (... or sync_counter(SYNC_COUNT_LENGTH - 1)) and reset_counter(5);
AR# 46483
日期 10/11/2014
状态 Shared
Type 综合文章
IP