The following answer record points you to the information required for designing an I/O interface, PCIe, EMAC, DSP and XADC in 7 Series FPGAs.
NOTE: This Answer Record is part of the Xilinx 7 Series FPGA Solution Center (Xilinx Answer 46370). The Xilinx 7 Series FPGA Solution Center is available to address all questions related to 7 Series devices. Whether you are starting a new design with 7 Series FPGAs or troubleshooting a problem, use the 7 Series FPGA Solution Center to guide you to the right information.
Please refer to the following Solution Center Answer Records and User Guides which provide more information when designing for a I/O interface, PCIe, EMAC, DSP, or XADC design.