There are several reasons to bootload into block RAM instead of DDR, most notably due to speed and ease of the flow.
The most simple will occur when your entire program fits into block RAM, and you only have one single-boot bitstream and one single ELF application in the same flash device to worry about. This method requires nothing more than your block RAM-linked application, SDK, and iMPACT.
- In SDK, finish writing and debugging your application
- Click Xilinx Tools -> Program FPGA
- Select your application ELF image, and click Program
- You will now have a download.bit located in your hw_platform folder within your workspace.
- Open iMPACT
- On the left side, click Create PROM File
- Select your desired flash (either SPI or BPI)
- Click the green arrow.
- In the second column, select your device and the flash size from the drop-down menus, and click Add Storage Device
- Click the second green arrow.
- In the third column, define an output directory for your MCS (the final image file)
- File Format = MCS
- Add Non-Configuration Data Files = No.
- Click OK on the screen
- When prompted, add your download.bit that was saved in step-4 to address offset 0x0.
- When prompted, do not add a second bitstream.
- On the left side of the window, click Generate Programming File
- Double-click Boundary Scan.
- Initialize the chain
- Right-click on the device, and Add SPI/BPI flash.
- Select your flash device
- Right-click on the flash, and click Program