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AR# 4671

A1.5, XSI, Virtex: Error: Either a NOR, or an AND and an OR gate (two-input) is required for mapping.

Description

Keywords : VIRTEX, design, fpga, compiler, target, library

Urgency : Standard

General description:

FPGA compiler or Design Compiler optimization halted with the
following error:

Error: The target library does not contain all required gates.
Either a NOR, or an AND and an OR gate (two-input) is required for mapping. (OPT-102)

解决方案

1


For FPGA Compiler Users:

*** If this happens in FPGA compiler, make sure you are using
the Virtex script & setup file available in
$XILINX/synopsys/examples/
( template.synopsys_dc.setup_virtex and
template.fpga.script.virtex)
Link the virtex library to the end of setup file by typing the
following command:

synlibs -fc xfpga_virtex-speed_grade

Also notice that the script file omits 'replace_fpga' command.

A recompiled Virtex library may be downloaded from the Xilinx FTP site.
See (Xilinx Solution 4666) for details on downloading and
installing the library.

2

For Design Compiler Users:

*** If this is happens in Design Compiler also make sure you are
using the Virtex script & setup file available in
$XILINX/synopsys/examples/ (template.synopsys_dc.setup_virtex and
template.fpga.script.virtex)

Link the virtex library to the end of setup file by typing the
following command:

synlibs -dc xdc_virtex-<speed_grade>

If this problem still exists after the set_port_is_pad command,
an updated Virtex library may be downloaded from the Xilinx
FTP site. See (Xilinx Solution 4666) for details on downloading and
installing the library.


Installation of this library should fix this problem.
AR# 4671
创建日期 09/23/1998
Last Updated 04/30/2007
状态 Archive
Type 综合文章