AR# 46881

描述

解决方案

Zynq platform supports two different JTAG modes:

• Cascaded JTAG Chain Mode
• Independent JTAG Chain Mode

The mode is determined through Mode Input at the time the system comes out of reset.

For more information, refer to chapter 27 of the Zynq-7000 EPP Technical Reference Manual (UG585).

ZC702 BOARD :CASCADED JTAG CHAIN MODE

1. Configure the following jumper and switch settings:
   

2. Connect the third-party debug cable to the PJTAG Connector (J58).
3. Power on the board.
4. Open and Run the third-party debug software:
   1. For ARM DS-5, see (Xilinx Answer 47764).
   2. For Lauterbach, see (Xilinx Answer 47767).
      

ZC702 BOARD :INDEPENDENT JTAG CHAIN MODE

1. Program the QSPI device with a valid image of FSBL and u-boot.
2. Configure the following jumper and switch settings:
   

3. Connect the third-party debug cable to the PL PJTAG Connector (J41).
4. Connect the Platform USB cable to the Platform USB Connector (J2).
5. Power on the board.
6. Stop the execution of uboot.
7. Program the bitstream that routes the JTAG signals out from PL (using impact).
8. Open and Run the third-party debug software:
   1. For ARM DS-5, see (Xilinx Answer 47764).
   2. For Lauterbach, see (Xilinx Answer 47767).

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