The Design Assistant walks you through the recommended design flow for Vivado HLS.
The Design Assistant not only provides useful design and troubleshooting information, but also points you to the exact documentation you need to read to help you design efficiently with Vivado High-Level Synthesis.
Note: This answer record is part of the Xilinx Vivado HLS Solution Center (Xilinx Answer 47428).
The Xilinx Vivado HLS Solution Center is available to address all questions related to Vivado HLS.
Free video trainings are available at the Xilinx Training site:
|(Xilinx Answer 60923)||Design Assistant for Vivado HLS : Understanding the Vivado HLS Design Flow|
|(Xilinx Answer 60924)||Design Assistant for Vivado HLS : C Code and Vivado HLS|
|(Xilinx Answer 60925)||Design Assistant for Vivado HLS : Design Analysis and Optimization|
|(Xilinx Answer 60926)||Design Assistant for Vivado HLS : RTL Verification|
|(Xilinx Answer 60927)||Design Assistant for Vivado HLS : Integrating HLS IP into the System|