We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 47567

Zynq-7000 AP SoC, Boot - Program Counter (PC) Of CPU1 Points to an Invalid Address when Booting from JTAG


During boot, the second CPU (CPU1) executes a WFE instruction. When parking the second CPU, the BootROM does not take into consideration that memory is remapped and hidden upon completion of the BootROM process. As a result, the second CPU resumes operation from a location that is either mapped to the OCM or to DDR memory when it receives a wake-up event. The second CPU then runs random instructions, resulting in an undefined system behavior.

Use a JTAG debugger to set the start address of the second CPU to a known address.


Impact: Trivial. This behavior does not occur in boot modes other than JTAG and there is a work-around. There is no real functional impact. The intention of the JTAG boot mode is to provide debugger access to both CPUs through JTAG.
Work-around: Set the PC for CPU1 using the debugger as described below.
Systems that use boot from the JTAG controller.
Device Revision(s) Affected: Refer to (Xilinx Answer 47916) - Zynq-7000 Design Advisory Master Answer Record

Use a JTAG debugger to set the start address of the second CPU to a known address.

Follow these steps:

  1. Use a JTAG debugger to connect to the second CPU.
  2. Optionally, use memory write operations to load a WFE and branch instruction into memory.
  3. Set the PC of the second CPU to the desired execution start address.
  4. Start the second CPU.



Answer Number 问答标题 问题版本 已解决问题的版本
52538 Zynq-7000 AP SoC - Boot and Configuration N/A N/A


Answer Number 问答标题 问题版本 已解决问题的版本
46911 EDK 14.1 Zynq-7000 - How do I create a stub for the second CPU core? N/A N/A
AR# 47567
日期 03/06/2013
状态 Active
Type 设计咨询
  • Zynq-7000