描述

MIO 1 pin is a multifunction pin. During NOR boot, the pin is configured as address bit 25 and will be driven low when the system boots from the NOR device. 

MIO 1 pin must not be connected as a chip select to a second SRAM/NOR device or be used in a way to adversely affect other board logic during boot.

解决方案

Impact: Minor. MIO1 can not directly be used as chip select for the SRAM device.

Work-around: External board logic is needed to disable the SRAM device during boot.

Configurations Affected: Systems that utilize NOR Boot mode and an SRAM device.

Device Revision(s) Affected: Refer to (Xilinx Answer 47916) Zynq-7000 Design Advisory Master Answer Record