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AR# 47607

Virtex-7 FPGA Gen3 Integrated Block for PCI Express v1.1 (ISE 14.1 / Vivado 2012.1) - TLP Processing Hints (TPH) support in IES Silicon

描述

Version Found: v1.1
Version Resolved and other Known Issues: See (Xilinx Answer 47441)

The Virtex-7 FPGA Integrated Block For PCI Express v1.1 core does not supportTLP Processing Hints (TPH) in IES Silicon.

解决方案

The TPH PCI Express Extended Capability is not supported when enabling virtual functions for users targeting IES silicon.This is a known issue and will be fixed in a future release of the core.

NOTE: "Version Found" refers to the version the problem was first discovered. The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.

Revision History
05/08/2012 - Initial release

链接问答记录

主要问答记录

AR# 47607
日期 05/20/2012
状态 Active
Type 已知问题
IP
  • Virtex-7 FPGA Gen3 Integrated Block for PCI Express (PCIe)
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