AR# 47823


LogiCORE IP Serial RapidIO Gen2 v1.4 - how to recognise a CRC Error


The LogiCORE IP Serial RapidIO Gen2 v1.4 core has an additional port for debugging as described in (Xilinx Answer 47191)

However, it does not include the CRC Error port.

How should I know if a CRC error occurs?


If the following is true, there is a CRC error:

PR_debug[160] &&phy_debug[196:192] == h04


PR_send[160]: Send PNA( OLLM Rx detects the condition for sending PNA)

phy_debug[196:192]:cause field for outgoing PNAs

AR# 47823
日期 11/19/2014
状态 Active
Type 综合文章
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