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AR# 47852

7 Series FPGAs GTP Transceivers - Known Issues and Answer Record List

描述

This answer record lists the Known Issues and Answer Records associated with the 7 series FPGAs GTP transceivers.

解决方案

Usage

Wizard

  • (Xilinx Answer 54691) IP Release Notes and Known Issues for 7 Series FPGAs Transceivers Wizard for Vivado 2013.1 and newer versions
  • (Xilinx Answer 60489) Design Advisory for 7 Series FPGAs Transceivers Wizard v3.2 or earlier: GTH/GTP Production RX reset sequence can get stuck 
  • (Xilinx Answer 59294) Design Advisory GT wizard - CPLL causes power spike on power up for 7 series GTs
  • (Xilinx Answer 56117) 7 Series GTX/GTH/GTP TX buffer bypass port settings mismatch with user guide
  • (Xilinx Answer 55791) Design Advisory for 7 Series FPGAs Transceivers Wizard - Required Updates to Wizard v2.5
  • (Xilinx Answer 55366) Design Advisory for 7 Series FPGA GTX/GTH/GTP Transceivers: Transceiver Wizard Sets Suboptimal RX Termination Use Modes
  • (Xilinx Answer 55009) Design Advisory for 7 Series FPGA GTX/GTH/GTP Transceivers - TX Sync Controller Change for Phase Alignment in Buffer Bypass Mode
  • (Xilinx Answer 53396) 7 Series FPGAs Transceiver Wizard v2.4 - Known Issues and Release Notes
  • (Xilinx Answer 52263) 7 Series FPGAs Transceivers Wizard v2.3 - Known Issues and Release Notes
  • (Xilinx Answer 50827) 7 Series FPGAs Transceivers Wizard v2.2 - Known Issues and Release Notes
  • (Xilinx Answer 47477) 7 Series FPGAs Transceivers Wizard v2.1 - Known Issues and Release Notes
  • (Xilinx Answer 47492) 7 Series GTP Transceivers - Buffer bypass default attributes
  • (Xilinx Answer 46048) 7 Series FPGAs Transceivers Wizard - What silicon revisions are supported by different Wizard or ISE design tool versions?
  • (Xilinx Answer 50890) 7 Series FPGAs Transceivers Wizard Flow in Vivado Design Suite 2012.2/2012.3/2012.4

Implementation

  • (Xilinx Answer 47688) 7 Series FPGA GTP Transceiver - Implementation error in ISE 14.1/Vivado 2012.1 design tools when sharing reference clocks

Silicon Revision Specific

  • (Xilinx Answer 51369) Design Advisory for the Artix-7 FPGA GTP Transceiver - Attribute Updates, Issues, and Work-arounds for Initial/General Engineering Sample (ES) Silicon
  • (Xilinx Answer 53561) Design Advisory for Artix-7 FPGA GTP Transceivers: RX Reset Sequence Requirement for Production Silicon 

Protocols

  • (Xilinx Answer 57740) Artix-7 FPGA GTP Wizard v2.6 in ISE 14.6 - VHDL wrapper has RX termination set incorrectly for PCIe 
  • (Xilinx Answer 51402) 7 Series Integrated Block for PCI Express v1.6: Incorrect RX_CM_TRIM[4:0] setting for Artix-7 FPGAs

链接问答记录

子答复记录

相关答复记录

Answer Number 问答标题 问题版本 已解决问题的版本
55791 面向 7 系列 FPGA 收发器向导的设计咨询:向导 v2.5 版所需的更新 N/A N/A
AR# 47852
日期 08/07/2014
状态 Active
Type 已知问题
器件
  • Artix-7
IP
  • 7 Series FPGAs Transceivers Wizard
的页面