This article forms part of the SelectIO Solution Centre (Xilinx Answer 50924).
It outlines the considerations when interfacing to other devices using SelectIO.
For interfacing any two devices, the basic rule is they should have the same or compatible I/O standard(s).
Xilinx devices are flexible enough to interface with most devices directly, due to their large array of IOSTANDARD settings.
Below is a basic checklist for I/O standards interfacing:
One common scenario we come across is MIPI-DPHY.
There is no native support for this in 7 Series devices, so XAPP894 is available.
MIPI-DPHY is supported as an I/O standard in UltraScale+ devices.
For further information on IOSTANDARD settings and attributes see (Xilinx Answer 47278)
Below is a list of important articles relating to interfacing of Xilinx Devices:
|(Xilinx Answer 11510)||Can we leave differential inputs un-driven?|
|(Xilinx Answer 40191)||Interfacing different types of LVDS in 7 Series|
|(Xilinx Answer 43428)||Receiving sub-LVDS in Spartan-6|
|(Xilinx Answer 66786)||Using LVDS in 1.2V UltraScale I/O banks.|
|(Xilinx Answer 63305)||I/O support of LPDDR4|