AR# 4901


A1.5/F1.5 - Synopsys design has multiple loads on net with some loads are not getting driven.


A design from FPGA Compiler version 1997.08 is creating an sxnf with several buses where some of the driver are not getting connected to the loads. There are 54 x4kma:111 WARNINGs (FMAPs being removed) and 54 x4kma:340 WARNINGs (signals being removed) in the cubi_top.mrp report.


This problem was fixed in version 1.5i.

AR# 4901
日期 10/05/2008
状态 Archive
Type 综合文章
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