We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 4915

Virtex - The data inputs of a MUXF6 can come only from the output of a MUXF5


The data inputs (I0 & I1) of the MUXF6 can come only from the outputs of a MUXF5. This is a physical limitation of using the MUXF6. If the data inputs of a MUXF6 do not come from a MUXF5, a user will receive a message from map(A1.5p) of the following form:

"ERROR: xvkma F6MUX <instance name of muxf6> fed from illegal source through net/signal: <netname that does not originate from muxf5> (only legal sources are F5MUXes)"

The select input for the MUXF6 doe not have to originate from a muxf5.


If you run into this problem from a synthesized HDL design, which does not instantiate the MUXF6, the synthesis tool has incorrectly inferred the use of a MUXF6. Contact your synthesis vendor for help.

If you run into this problem with a synthesized(HDL) or schematic design,

and you have instantiated the MUXF6, there two several options:

(1) The easiest option is to remove the MUXF6 altogether and replace it with either a MUXF5, or RTL.

(2) Instead of directly connecting a signal to the inputs of a MUXF6, indirectly

connect it to the MUXF6 by routing the signal through a MUXF5 first.

AR# 4915
创建日期 08/21/2007
Last Updated 12/15/2012
状态 Active
Type 综合文章