This issue occurs with v11.3 of the 1000BASE-X PCS/PMA or SGMII core when targeting Artix FPGA 200t silicon (does not apply when targeting Artix FPGA 100t silicon).
The following error message occurs when implementing the example design:
After I work around the first one, I get the following error:
If targeting the Artix FPGA 200T silicon (regardless of core configuration), the example design top-level seems to be missing the TXOUTCLK BUFG and all of its connection to the MMCM.
To fix this issue, add the following codes in the example_design\gig_eth_pcs_pma_v11_3_example_design.v:
1. On the wire declaration, add:
6/14/2012 - Initial release