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AR# 50656

13.4 FIFO Generator v8.4: FIFO Generator Design with AXI-Stream Packet FIFO configuration fails in simulation with deadlock condition

描述

My design fails in simulation in a deadlock condition when the FIFO Generator is used in AXI-Stream Packet FIFO configuration.

During simulation both M_AXIS_TVALID and S_AXIS_TREADY are de-asserted at the same time which causes the deadlock situation.

解决方案

This is a known design limitation with FIFO Generator v8.4 and beyond, and occurs when the FIFO depth is less than or equal to the packet size.

To work around this, the FIFO depth should be at least twice the maximum packet size for AXI-Stream Packet FIFO.

AR# 50656
日期 09/10/2014
状态 Active
Type 综合文章
器件
  • Artix-7
  • Kintex-7
  • Virtex-7
Tools
  • ISE Design Suite - 13.4
IP
  • FIFO Generator
的页面