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MIG 7 Series - VCC_AUX can be set incorrectly in certain multi-controller configurations
Version Found: v1.5
Version Resolved and other Known Issues: See (Xilinx Answer 45195).
The MIG 7 Series GUI can incorrectly set the default VCC_AUX for different controllers within the same VCC_AUX region.
1 DDR3 and 1 QDRII+ controller.
Controller 0 is placed in Bank 35 and uses a VCC_AUX=2.0V by default.
Controller 1 is placed at Bank 33 and uses a VCC_AUX=1.8V by default.
When this situation occurs, the MIG GUI will prevent the user from proceeding to the next step in the IP generation flow.
Xilinx recommends upgrading to the latest version of MIG to work around the problem.
It is possible to generate each controller individually and then combine them into your own top-level wrapper.